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? 2016 microchip technology inc. ds20005519a-page 1 features ? 10 to 450v input voltage range ? <1.3 ma supply current ? >1 mhz clock ? 49% maximum duty version applications ? off-line high frequency power supplies ? universal input power supplies ? high density power supplies ? very high efficiency power supplies ? extra wide load range power supplies description hv9120 and hv9123 are switch-mode power supply (smps) controllers suitable for the control of a variety of converter topologies, including flyback and forward converter. using an internal, high-voltage regulator, hv9120 and hv9123 can derive a bias supply for starting-up and powering a converter from a variety of power sources, such as a 12v battery or the rectified ac (230 vac) line. hv9120/hv9123 controllers include all essentials for a power-converter design, such as a bandgap reference, an error amplifier, a ramp generator, a high-speed pwm comparator, and a gate driver. a shutdown latch provides on/off control. device power consumption is less than 6 mw when shutdown. hv9120 offers 50% maximum duty and hv9123 offers nearly 100% duty. package types see table 3-1 for pin information 16-lead soic 16-lead pdip 1 16 4 1 16 hv9120/hv9123 high-voltage, current-mode, pwm controller
hv9120/hv9123 ds20005519a-page 2 ? 2016 microchip technology inc. block diagram hv9120
? 2016 microchip technology inc. ds20005519a-page 3 hv9120/hv9123 block diagram hv9123
hv9120/hv9123 ds20005519a-page 4 ? 2016 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings ? input voltage, v in ............................................................................................................................... ..................... 450v device supply voltage, v dd ............................................................................................................................... ..... 15.5v logic input voltage ............................................................................................................ ............... -0.3v to v dd + 0.3v linear input voltage ........................................................................................................... ............... -0.3v to v dd + 0.3v high-voltage regulator input current (continuous), i in .......................................................................................... 2.5 ma operating temperature range .................................................................................................... ............ -40c to +125c storage temperature range ...................................................................................................... ............. -65c to +150c power dissipation: 16-lead soic .... .............. .............. .............. .............. .............. ........... ........... ...................... 900 mw 16-lead pdip ............ .............. .............. .............. .............. .............. ........... ........... ........... . 1000 mw ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect devi ce reliability. electrical characteristics electrical specifications: v dd = 10v, v in = 48v, v disc = 0v, r bias = 390 k ? , r osc = 330 k ? , t a = 25c, unless oth- erwise noted. parameter symbol min typ max units conditions reference output voltage v ref 3.92 4.00 4.08 v r l = 10 m ? 3.84 4.00 4.16 r l = 10 m ? , t a = -40c to +125c output impedance z out 15 30 45 k ? ( note 1 ) short circuit current i short - 125 250 av ref = gnd change in v ref with temperature ? v ref - 0.25 - mv/c t a = -40c to +125c ( note 1 ) oscillator oscillator frequency f max 1.0 3.0 - mhz r osc = 0 ? initial accuracy f osc 80 100 120 khz r osc = 330 k ? ( note 2 ) 160 200 240 r osc = 150 k ? ( note 2 ) vdd regulation - - - 15 % 9.5v< v dd <13.5v temperature coefficient - - 170 - ppm/c t a = -40c to +125c ( note 1 ) pwm maximum duty cycle hv9120 d max 49.0 49.4 49.6 % ( note 1 ) hv9123 95 97 99 dead time hv9123 d min - 225 - ns hv9123 only ( note 1 ) minimum duty cycle - - 0 % ? pulse width where pulse drops out -80125ns ( note 1 ) current limit maximum input signal v lim 1.0 1.2 1.4 v v fb = 0v delay to output t d -80120nsv cs = 1.5v, v comp 2.0v ( note 1 )
2016 microchip technology inc. ds20005519a-page 5 hv9120/hv9123 note 1: design guidance only; not 100% tested in production. 2: stray capacitance on osc in pin must be ? 5 pf. error amplifier feedback voltage v fb 3.92 4.00 4.08 v fb shorted to comp input bias current i in - 25 500 na v fb = 4.0v input offset voltage v os nulled during trim - ? open loop voltage gain a vol 60 80 - db ( note 1 ) unity gain bandwidth gb 1.0 1.3 - mhz ( note 1 ) output source current i source -1.4 -2.0 - ma v fb = 3.4v output sink current i sink 0.12 0.15 - ma v fb = 4.5v high-voltage regulator and start-up input voltage v in 10 - 450 v i in < 10 a; v cc > 9.4v input leakage current i in --10 av dd > 9.4v regulator turn-off threshold voltage v th 8.0 8.7 9.4 v i in = 10 a undervoltage lockout v lock 7.0 8.1 8.9 v ? supply supply current i dd - 0.75 1.3 ma c l < 75 pf quiescent supply current i q -0.55- mav nsd = 0v nominal bias current i bias -20- a? operating range v dd 9.0 - 13.5 v ? shutdown logic shutdown delay t sd -50100nsc l = 500 pf, v cs = 0v ( note 1 ) nsd pulse width t sw 50 - - ns ( note 1 ) rst pulse width t rw 50 - - ns ( note 1 ) latching pulse width t lw 25 - - ns v nsd , v rst =0v( note 1 ) input low voltage v il --2.0v? input high voltage v ih 7.0 - - v ? input current, input high voltage i ih -1.05.0 av in = v dd input current, input low voltage i il --25-35 av in = 0v output output high voltage v oh v dd - 0.25 -- vi out = 10 ma v dd - 0.3 -- i out = 10 ma, t a = -40c to 125c output low voltage v ol --0.2vi out = -10 ma --0.3 i out = -10 ma, t a = -40c to 125c output resistance pull up r out -1525 i out = 10 ma pull down -8.020 pull up - 20 30 i out = 10 ma, t a = -40c to 125c pull down -1030 rise time t r -3075nsc l = 500 pf ( note 1 ) fall time t f -2075nsc l = 500 pf( note 1 ) electrical character istics (continued) electrical specifications: v dd = 10v, v in = 48v, v disc = 0v, r bias = 390 k , r osc = 330 k , t a = 25c, unless oth- erwise noted. parameter symbol min typ max units conditions
hv9120/hv9123 ds20005519a-page 6 ? 2016 microchip technology inc. 1.1 truth table temperature specifications parameter symbol min typ max units conditions temperature ranges operating temperature -40 125 c storage temperature -65 ? 150 c package thermal resistances thermal resistance, soic ja ?83?c/w thermal resistance, pdip ja ?51?c/w truth table shutdown reset output h h normal operation hh l normal operation, no change l h off, not latched l l off, latched l h l off, latched, no change
? 2016 microchip technology inc. ds20005519a-page 7 hv9120/hv9123 2.0 typical performance curves figure 2-1: typical performance curves output switching frequency vs. oscillator resistance 10k 100k 1m r osc () f out (hz) 1m 100k 10k psrr - error amplifier and reference 10 100 1k 10k 100k 1m 80 70 60 50 40 20 10 0 -10 error amplifier open loop gain/phase gain (db) phase ( o c) 180 120 60 0 -60 -120 -180 frequency (hz) 10 6 10 5 10 4 10 3 10 2 10 1.0 0.1 error amplifier output impedance (z 0 ) 0 -10 -20 -30 -40 -50 -60 -70 -80 bias resistance () 10 5 10 6 10 7 bias current (a) v dd = 10v psrr (db) frequency (hz) z 0 () 100 1k 10k 100k 1m 10m frequency (hz) v dd = 10v 100 1k 10k 100k 1m 100 10 1.0 hv9120 hv9123 r discharge vs. t off (hv9123 only) r discharge () t off (nsec) r osc = 10k r osc = 1.0k r osc = 100k 10 -1 10 10 1 10 2 10 3 10 4 10 5 10 6 10 4 10 3 10 2
hv9120/hv9123 ds20005519a-page 8 ? 2016 microchip technology inc. 3.0 pin description the locations of the pins are listed in features . table 3-1: pin description pin # symbol hv9120 symbol hv9123 description 1v in v in high-voltage, v dd regulator input 2 nc nc no connect 3 nc nc no connect 4 cs cs current-sense input 5 gate gate gate-drive output 6 gnd gnd ground 7 vdd vdd high-voltage, v dd regulator output 8 osco osco oscillator output 9 osci osci oscillator input 10 nc disc oscillator discharge, current set 11 vref vref 4v reference output reference voltage level can be over- ridden by an externally-applied volt- age source. 12 nsd nsd active low input to set shutdown latch 13 rst rst active high inpu t to reset shutdown latch 14 comp comp error-a mplified output 15 fb fb feedback-voltage input 16 bias bias internal bias, current set
? 2016 microchip technology inc. ds20005519a-page 9 hv9120/hv9123 4.0 test circuits the test circuits for characterizing error-amplifier output impedance, z out , and error-amplifier, power-supply rejection ration, psrr, are shown in figure 4-1 . figure 4-1: test circuits + C 60.4k 40.2k 1.0v swept 100hz - 2.2mhz tektronix p6021 (1 turn secondary) 0.1f +10v (v dd ) gnd (-v in ) (fb) error amp z out + C reference v 2 10.0v 4.0v 100k 1% 100k 1% psrr 0.1f 0.1v swept 10hz - 1.0mhz v 1 v 2 v 1 reference
hv9120/hv9123 ds20005519a-page 10 ? 2016 microchip technology inc. 5.0 detailed description 5.1 high-voltage regulator the high-voltage regulator included in hv9120 and hv9123 consists of a high-voltage, n-channel, deple- tion-mode dmos transistor, driven by an error ampli- fier, providing a current path between the v in terminal and the v dd terminal. the maximum current, about 20 ma, occurs when v dd = 0, with current reducing as v dd rises. this path shuts off when v dd rises to somewhere between 7.8 and 9.4v. so, if v dd is held at 10 or 12v by an external source, no current other than leakage is drawn through the high voltage transistor. this mini- mizes dissipation. use an external capacitor between v dd and gnd to store energy used by the chip in the time between shut- off of the high voltage path and the v dd supply?s output rising enough to take over powering the chip. this capacitor should have a value of 100x or more the effective gate capacitance of the mosfet being driven, as well as very good high-frequency character- istics. see the equation below. ceramic caps work well. electrolytic capacitors are generally not suitable. the device uses a resistor divider string to monitor v dd for both the under voltage lockout circuit and the shutoff circuit of the high voltage fet. setting the under volt- age sense point about 0.6v lower on the string than the fet shutoff point guarantees that the under voltage lockout releases before the fet shuts off. 5.2 bias circuit hv9120 and hv9123 require an external bias resistor, connected between the bias pin and gnd , to set cur- rents in a series of current mirrors used by the analog sections of the chip. the nominal external bias current requirement is 15 to 20 a, which can be set by a 390 k ? to 510 k ? resistor if v dd = 10v, or a 510 k ? to 680 k ? resistor if v dd = 12v. a precision resistor is not required, 5% meets the device requirements. 5.3 clock oscillator the clock oscillator of the hv9120 and hv9123 con- sists of a ring of cmos inve rters, timing capacitors, and a capacitor-discharge fet. a single external resistor between the osci and osco sets the oscillator fre- quency (see figure 2-1 , output switching frequency vs oscillator resistance). hv9120 includes a frequency-dividing flip-flop that allows the part to operate wi th a 50% duty limit. accord- ingly, the effective switching frequency of the power converter is half the oscillator frequency (see figure 2- 1 , output switching frequency vs oscillator resis- tance). an internal, discharge fet resets the oscillator ramp at the end of the oscillator cycle. the fet is internally connected to gnd in hv9120 (50% max duty version). whereas, the fet is externa lly connected to gnd, by way of a resistor, in the hv9123 (100% duty version). the resistor programs the o scillator dead time at the end of the oscillator peri od in hv9123 applications. the oscillator turns off during shutdown to reduce sup- ply current by about 150 a. 5.4 reference the reference of the hv91 20 and hv9123 consists of a band-gap reference, followed by a buffer amplifier, which scales the voltage up to 4.0v. the scaling resis- tors of the buffer amplifie r are trimmed during manufac- ture so that the output of the error amplifier, when connected in a gain of -1 c onfiguration, is as close to 4.0v as possible. this nulls out the input offset of the error amplifier. as a consequence, even though the observed reference voltage of a specific part may not be exactly 4.0v, the feedback voltage required for proper regulation will be 4.0v. an approximately 50 k ? resistor is located internally between the output of the reference buffer amplifier and the circuitry it feeds?reference output pin and non- inverting input to the error amplifier. this allows overrid- ing the internal reference with a low impedance voltage source 6.0v. using an external reference reinstates the input offset voltage of the error amplifier. overriding the reference should seldom be necessary. the reference of the hv9120 and hv9123 is a high impedance node, and usually there will be significant electrical noise nearby. therefore, a bypass capacitor between the reference pin and gnd is strongly recom- mended. the reference buffer amplifier is compen- sated to be stable with a capacitive load of 0.01 to 0.1 f. 5.5 error amplifier the error amplifier in hv9120 and hv9123 is a low- power, differential-input, op erational amplifier. a pmos input stage is used, so the common mode range includes ground and the input impedance is high. 5.6 current sense comparators hv9120 and hv9123 use a dual-comparator system with independent comparator s for modulation and cur- rent limiting. this allows t he designer greater latitude in compensation design, as there are no clamps, except esd protection, on the compensation pin. c vdd 100 gate charge of fet at 10v ?? ? ?
? 2016 microchip technology inc. ds20005519a-page 11 hv9120/hv9123 5.7 remote shutdown the nsd and rst pins control the shutdown latch. these pins have internal, current-source pull-ups so they can be driven from open drain logic. when not used they should be left open, or connected to v dd . 5.8 output buffer the output buffer of hv 9120 and hv9123 is of stan- dard cmos construction?p-channel pull-up and n- channel pull-down. thus, the body-drain diodes of the output stage can be used for spike clipping. external schottky diode clamping of the output is not required. figure 5-1: shutdown timing waveforms 50% t d 1.5v cs 0 t sd 50% 90% 90% vdd nsd 0 t lw 50% 50% t sw 50% 50% t rw 50% t r 10ns t f 10ns t r , t f 10ns vdd nsd 0 vdd rst 0 vdd gate 0 vdd gate 0
hv9120/hv9123 ds20005519a-page 12 ? 2016 microchip technology inc. 6.0 packaging information 6.1 package marking information legend: xx...x product code or customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part nu mber cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or custom er-specific information. package may or not include the corporate logo. 3 e 3 e 16-lead soic xxxxxxxxx xxxxxxxxxxx yywwnnn e 3 example hv9120ng 1611343 e 3 16-lead pdip example yywwnnn xxxxxxxxxxxx xxxxxxxxxxxxxx e 3 1611343 hv9120p e 3
2016 microchip technology inc. ds20005519a-page 13 hv9120/hv9123 16-lead soic (narrow body) package outline (ng) 9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch symbol a a1 a2 b d e e1 e h l l1 l2 dimension (mm) min 1.35* 0.10 1.25 0.31 9.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 9.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 10.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation ac, issue e, sept. 2005. 7klvglphqvlrqlvqrwvshfl?hglqwkh-('(&gudzlqj drawings are not to scale. d seating plane gauge plane l l1 l2 top view side view view a-a view b view b 1 e1 e a a2 a1 a a seating plane e b h h 16 1 note 1 note 1 (index area d/2 x e1/2) note: 1. 7klvfkdpihuihdwxuhlvrswlrqdo,ilwlvqrwsuhvhqwwkhqd 3lqlghqwl?hupxvwehorfdwhglqwkhlqgh[duhdlqglfdwhg7k h3lqlghqwl?hufdqeh dproghgpdunlghqwl?hudqhpehgghgphwdopdunhurudsulqwhg lqglfdwru note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
hv9120/hv9123 ds20005519a-page 14 ? 2016 microchip technology inc. 16-lead pdip (.300in row spacing) package outline (p) .790x.250in body, .210in height (max), .100in pitch note 1 (index area) 16 1 d l a1 a a2 seating plane e e1 d1 d1 e a a side view top view view a - a ea eb b b1 view b view b note: 1. $3lqlghqwl?hupxvwehorfdwhglqwkhlqgh[duhdlqglfdwhg 7kh3lqlghqwl?hufdqehdproghgpdunlghqwl?hudqhpehggh gphwdopdunhuru dsulqwhglqglfdwru symbol a a1 a2 b b1 d d1 e e1 e ea eb l dimension (inches) min .130* .015 .115 .014 .045 .745 ? .005 .290 ? .240 .100 bsc .300 bsc .300* .115 nom - - .130 .018 .060 .790 - .310 .250 - .130 max .210 .035* .195 .023 ? .070 .810 ? .050* .325 .280 .430 .150 -('(&5hjlvwudwlrq069duldwlrq$%,vvxh'-xqh 7klvglphqvlrqlvqrwvshfl?hglqwkh-('(&gudzlqj ?7klvglphqvlrqgliihuviurpwkh-('(&gudzlqj drawings not to scale. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging. note: for the most current package drawings, see the microchip packaging specification at www.microchip.com/packaging.
2016 microchip technology inc. ds20005519a-page 15 hv9120/hv9123 appendix a: revision history revision a (may 2016) ? updated file to microchip format. ? merged supertex doc #s dsfp-hv9120 and dsfp-hv9123 to microchip ds20005519a. ?revised electrical characteristics to accommo- date the merged products. ? updated pin names to reflect new naming con- vention. ? significant text changes to detailed description ? minor text changes throughout.
hv9120/hv9123 ds20005519a-page 16 ? 2016 microchip technology inc. product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . note: for media types m901 and m934, the base quantity for tap and reel was standardized at 2600/reel. both options will result in delivery of the same number of parts/reel. device: hv9120 = high ? voltage ? current \ mode ? pwm ? controller, ? 10 ? to ? 450v ? input ? voltage ? range, 49% ? duty ? cycle hv9123 = high ? voltage ? current \ mode ? pwm ? controller, ? 9 ? to ? 80v ? input ? voltage ? range, 99% ? duty ? cycle package: ng = 16-lead soic p = 16-lead pdip environmental g = lead (pb)-free/rohs-compliant package media type: (blank) = 45/tube for ng package 24/tube for p package m901 = 2600/reel for ng package m934 = 2600/reel for ng package examples: a) hv9120ng-g 14-lead soic package, 53/tube b) hv9123ng-g 14-lead soic package, 53/tube c) hv9123ng-g-m901 14-lead soic package, 2600/reel part no. x device x environmental x x package options media - - type
? 2016 microchip technology inc. ds20005519a-page 17 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, th e microchip logo, dspic, flashflex, flexpwr, jukeblox, k ee l oq , k ee l oq logo, kleer, lancheck, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic 32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip te chnology incorporated in the u.s.a. and other countries. the embedded control solutions company and mtouch are registered trademarks of microc hip technology incorporated in the u.s.a. analog-for-the-digital age, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, ecan, in-circuit serial programming, icsp, inter-chip connectivity, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, righttouch logo, real ice, sqi, serial quad i/o, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip te chnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered tradem ark of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2016, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-5224-0537-5 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem by dnv == iso/ts 16949 ==
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